At present, making an insulating layer on a thin film transistor (TFT) array substrate by using a traditional SiNx process can not emerge a contact hole which is used for connecting a pixel electrode and a drain electrode, as shown in FIG. 1. But, making an insulating layer on the TFT array substrate by using a resin process (Resin PA), as shown in FIG. 2, will emerge a number of contact holes 1 like pixel points. When a subsequent alignment liquid, for example, a PI liquid 2, is applied, the PI liquid 2 will flow into these contact holes, which will induce the reduction in thickness of the alignment film, after the film is cured.
Generally, the size and number of the contact holes are proportional to the reduction in thickness of the polyimide (PI) film, namely, the more and bigger the contact holes are, the more the PI film is reduced in thickness. The number of the contact holes is proportional to the amount of the pixels, in an ordinary resolution of 60-120 PPI, the reduction in thickness of the PI film is not obvious, and it can not bring about obvious defect; but, in the resolution of higher than 1700 PPI, the contact holes, for example, at the depth of 1.5 μm, will cause more reduction in thickness of the PI film, for example, the thickness can be reduced from 800 Å to 450 Å, too thin PI film will cause problems of emerging afterimages and reduction in contrast ratio in images displayed on the liquid crystal device.
In a method of the prior art, in order to avoid the reduction in thickness of the PI film, the proportion of PI in the PI liquid will be typically increased, for example, the proportion of PI in the PI liquid applied on a FFS TFT substrate is typically 5%-6.5%, which is slightly higher than those proportion in the PI liquid applied on a TN TFT substrate. However, the proportion of PI liquid is typically too difficult to be higher than 6.5%. If the proportion of PI liquid is too high and the PI liquid is too viscous, it will induce non-uniform coating of the PI liquid. Therefore, for high resolution TFT substrate, such an approach can not avoid the problems caused from the reduction in thickness of the PI film efficiently.